Camera interface classification and basic knowledge
July 25, 2022
Camera interface classification and basic knowledge
1. Introduction to the working principle of Camera
2. working principle
After the external light passes through the lens, it is filtered by the color filter and then irradiated on the Sensor surface. The Sensor converts the light transmitted from the lens into an electrical signal, and then converts it into a digital signal through the internal AD. If the Sensor does not integrate DSP, it will be transmitted to the baseband through DVP, and the data format at this time is RAW DATA. If DSP is integrated, RAW DATA data is processed by AWB, color matrix, lens shading, gamma, sharpness, AE and de-noise, and then output data in YUV or RGB format.
Finally, the CPU will send it to the framebuffer for display, so that we can see the scene captured by the camera.
3. YUV and YCbCr.
Generally speaking, camera is mainly composed of lens and sensor IC. Some sensor ICs are integrated with DSP, and some are not, but they also need external DSP processing. In terms of subdivision, the camera device consists of the following parts:
1) lens (lens) Generally, the lens structure of the camera is composed of several lenses, which are divided into plastic lens (Plastic) and glass lens (Glass).
2) sensor (image sensor) Senor is a kind of semiconductor chip, there are two types: CCD (Charge Coupled Device) which is the abbreviation of charge coupled device and CMOS (Complementary Metal-Oxide Semiconductor) complementary metal oxide semiconductor. The Sensor converts the light transmitted from the lens into an electrical signal, and then converts it into a digital signal through the internal AD. Since each pixel of the Sensor can only be sensitive to R light or B light or G light, each pixel stores a single color at this time, which we call RAW DATA data. In order to restore the RAW DATA data of each pixel to three primary colors, ISP is required to process.
CCD sensor, the charge signal is transmitted first, then amplified, and then A/D, with high imaging quality, high sensitivity, good resolution, low noise; slow processing speed; high cost and complex process.
CMOS sensor, the charge signal is amplified first, then A/D, and then transmitted; the imaging quality has low sensitivity and obvious noise; the processing speed is fast; the cost is low, and the process is simple.
3) ISP (Image Signal Processing) It mainly completes the processing of digital images, and converts the raw data collected by the sensor into a format supported by the display.
4) CAMIF (camera controller) The camera interface circuit on the chip controls the device, receives the data collected by the sensor and sends it to the CPU, and sends it to the LCD for display.
Like RGB, YUV is one of the commonly used color models in color space, and the two can be converted into each other. In YUV, Y represents luminance, and U and V represent chrominance. Compared to RGB, it has the advantage of taking up less space. YCbCr is part of the ITU-R BT601 recommendation during the development of the World Digital Organization video standard, and is actually a scaled and offset replica of YUV. Among them, Y has the same meaning as Y in YUV, Cb and Cr also refer to color, but they are different in the way of expression. In the YUV family, YCbCr is the most widely used member in the computer system, and its application fields are very wide. JPEG and MPEG all adopt this format. Most of the YUV that people talk about refers to YCbCr. YCbCr has many sampling formats, such as 4:4:4, 4:2:2, 4:1:1 and 4:2:0.
2. the camera interface classification
Common types are MIPI, DVP and usb interface interface
The PCLK limit of the DVP bus is about 96M, and the length of the traces should not be too long. The maximum rate of all DVPs is best controlled below 72M, so the PCB layout will be better. The MIPI bus speed is just a few hundred M, and it is coupled by the lvds interface. The traces must be of equal length in differential, and attention should be paid to protection, so the requirements for PCB traces and impedance control are higher. Generally speaking, 96M pclk is the limit of DVP, once in a team to do multi-camera image acquisition equipment, DVP bus connection. A few people who don't understand technology keep pushing. I say it's hardware wiring interference. I'm stuck on what low-speed control signals like I2C are interfered with. I've been watching the oscilloscope for several days. The driver reduces the PCLK frame rate to get it done.
1) DVP is a parallel port, which requires PCLK, VSYNC, HSYNC, D[0:11] - it can be 8/10/12bit data, depending on whether ISP or baseband supports it;
MIPI is LVDS (Low Voltage Differential Signaling), a low-voltage differential serial port. Only need CLKP/N, DATAP/N - support up to 4-lane, generally 2-lane can be done.
2) The MIPI interface has fewer signal lines than the DVP interface. Because it is a low-voltage differential signal, the interference generated is small, and the anti-interference ability is also strong. On top of that, DVP interfaces are limited in terms of signal integrity and rate limited. 500W can barely use DVP, 800W and above all use MIPI interface.
Note (LCD interface type):
The main difference between Mipi interface and LVDS interface (here is the type of LCD screen interface):
1. LVDS interface is only used to transmit video data, MIPI DSI can not only transmit video data, but also transmit control commands;
2. The LVDS interface mainly converts RGB TTL signals into LVDS signals in SPWG/JEIDA format for transmission, while the MIPI DSI interface transmits video data and control data required for screen control according to specific handshake sequences and instruction rules.
The LCD screen has RGB TTL, LVDS, MIPI DSI interfaces, which are different from the type (type) of the signal and the content of the signal.
The signal type of the RGB TTL interface is TTL level, the content of the signal is RGB666 or RGB888, as well as line and field synchronization and clock;
The LVDS interface signal type is LVDS signal (low voltage differential pair), and the content of the signal is RGB data as well as line and field synchronization and clock;
The MIPI DSI interface signal type is LVDS signal, and the content of the signal is video stream data and control commands.
Serial Interface (Serial Interface) refers to the sequential transmission of data bit by bit. Distance communication, but the transmission speed is slower.
Serial interface, the communication method in which the data of a piece of information are transmitted bit by bit in sequence is called serial communication. The characteristics of serial communication are: data bit transmission, transmission is carried out in bit order, at least only one transmission line can be completed; the cost is low but the transmission speed is slow. The distance of serial communication can be from several meters to several kilometers; according to the direction of information transmission, serial communication can be further divided into three types: simplex, half-duplex and full-duplex.
The characteristics of serial communication are: the transmission of data bits is carried out in bit order.
Parallel port signal:
Parallel interface refers to an interface standard that uses parallel transmission to transmit data. From the simplest parallel data register or dedicated interface integrated circuit chip such as 8255, 6820, etc., to the more complex SCSI or IDE parallel interface, there are dozens of types. The interface characteristics of a parallel interface can be described from two aspects: 1. The width of the data channel transmitted in parallel, also known as the number of bits transmitted by the interface; 2. The extra interface control line or interaction used to coordinate parallel data transmission characteristics of the signal. The width of the data can be from 1 to 128 bits or wider, and the most commonly used is 8 bits, which can transmit 8 data bits at a time through the interface. The most commonly used parallel interface in the computer field is the so-called LPT interface. The parallel port is 8 lanes that can transmit 8 bits (one byte) data at the same time.
It is not that the parallel port is fast. Due to the mutual interference (crosstalk) between the 8-bit channels, the transmission speed is limited, and the transmission is prone to errors. The serial ports do not interfere with each other.
(Differential mode signal: when double-ended input, the phase difference of the two signals is 180 degrees)
The so-called differential transmission means that the amplitudes transmitted by the sender on the two signal lines are equal, and the phases are opposite electrical signals, as shown in the following figure:
For the receiving end, the two received signals are subtracted to obtain a signal whose amplitude is doubled. The anti-jamming principle is: if the two signals are received in the same direction (the same direction and the same amplitude), the interference signal will be basically eliminated because the receiving end performs subtraction processing on the received two-line signals. That is, a differential amplifier only needs a few millivolts of effective signal amplitude at the input, but it can be indifferent to common-mode signals up to a few volts.
So how can we ensure that the interference signals received by the two signal lines are in phase and amplitude as much as possible? One method is to twist the two wires together, which is the so-called "twisted pair", because there is an electromagnetic theorem: it can be approximated that the interference signals received by the twisted pair are in the same phase and equal in amplitude, so the differential signal is more Used for signaling for a reason. Because of strong anti-interference.
For PCB engineers, the most concern is how to ensure that these advantages of differential routing are fully utilized in actual routing. Those who may have been exposed to Layout will understand the general requirements of differential wiring, that is, "equal length, equal distance". The equal length is to ensure that the two differential signals always maintain opposite polarities and reduce the common mode component; the equal distance is mainly to ensure that the differential impedance of the two is consistent and reduce reflection. The "as close as possible principle" is sometimes one of the requirements of differential routing.
5. Introduction to DSI
1. DSI is a kind of Lane expandable interface, 1 clock Lane/1-4 data Lanes
• DSI compliant peripherals support 1 or 2 basic modes of operation:
• Command Mode (similar to MPU interface)
• Video Mode (similar to RGB interface) - must use high-speed mode to transmit data, supports data transmission in 3 formats
• Non-Burst sync pulse mode
• Non-Burst synchronous event mode
• Burst mode
• Transfer Mode:
• High-Speed signaling mode
• Low-Power signaling mode - only data lane 0 is used (the clock is XORed by DP, DN).
• Frame type
• Short frame: 4 bytes (fixed)
• Long frame: 6~65541 bytes (variable)