Camera sor data transmission--DVP, SPI and MIPI

April 20, 2022

Latest company news about Camera sor data transmission--DVP, SPI and MIPI

Camera sor data transmission--DVP, SPI and MIPI

(1) Parallel data transmission DVP

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Control part: PWDN (power control), RST (reset), MCLK is the main clock provided by BB,
I2C bus (I2C_CLK, I2C_SDA, control sensor register)
Power supply part (two-way power supply): AVDD (2.7~3.0V), IOVDD (1.7~3.0V)
DVP output part: Vsync (frame sync signal), Hsync (line sync signal), PCLK (pixel clock), data data line (8-bit or 10-bit) – the original RGB data transmitted

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Vsync (frame sync signal) and Hsync (horizontal sync signal) timing diagram
In the figure: frame header identification, frame end identification (generated by the rising and falling edges of vsync respectively)
Line head identification, line end identification (generated by the rising and falling edges of hsync respectively)

PCLK: is the pixel synchronization clock signal, each PCLK corresponds to a pixel;
VSYNC: is the vertical synchronization signal. Taking the active high level as an example, VSYNC is set high until it is pulled low, and all the image data output by this section forms a frame;
HSYNC: is the line synchronization signal. Tell the receiver: all the signal outputs received by the receiver during the "HSYNC" valid period belong to the same line;
The parallel port transmits CMOS level signals. The sensor that only supports the parallel port DVP belongs to the low-end and old products. The new sensors generally support faster SPI or MIPI transmission.

(2) Parallel data transmission SPl

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Packet mode with frame header has 1bit, 2bit, 4bit receiving format:
1bit
Data0 7 6 5 4 3 2 1 0
2bit
Data0 7 5 3 1
Data1 6 4 2 0
4bit
Data0 7 3
Data1 6 2
Data2 5 1
Data3 4 0
The composition of a frame of data packet:

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(3) Serial data transmission MIPI

MIPI is an open standard for mobile application processors initiated by the MIPI Alliance, and the MIPI-CSI-2 protocol is a sub-protocol of the MIPI Alliance protocol, which is specially designed for the interface of the camera chip. Due to its high speed and low power consumption, Wide range of applications, TI, samsung, Qualcomm and other platforms are equipped with MIPI interface

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Data transmission timing diagram:

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The composition of a frame of data packet:

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